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IP and R&D Patent
Two patents granted. Four PCT applications. Two families in national phase across the United States, Europe, Japan, India and China.
Filed in the order the technology was built: material, process, theory, design algorithm.
The theory behind them is public: arXiv:2512.03368 and arXiv:2601.14500.
2026.07.29 Updated
NO
DATE
STATUS
PATENT (FILING) NO
COUNTRY
NAME
1
2/4/2022
Registered
10-2359995
Republic of Korea
Method for producing multi-component metal oxides exhibiting room-temperature superconductivity via solid-state chemical reaction
2
4/14/2023
Registered
10-2523480
Republic of Korea
Method for depositing superconducting metal oxides using Circular Target Laser Ablation (CTLA), and metal oxide thin-film processing
1
5/14/2025
Filed
10-2025-0062522
Republic of Korea
Method for modeling the superconducting state (PGC) in high-temperature superconductors
2
5/14/2025
Filed
10-2025-0062523
Republic of Korea
HIGH TEMPERATURE SUPERCONDUCTOR MODELLING METHOD BASED ON SUPERCONDUCTING ELECTRONIC CRYSTALS
3
6/16/2025
Filed
PCT/KR2025/095421
International (PCT)
HIGH TEMPERATURE SUPERCONDUCTOR MODELLING METHOD BASED ON SUPERCONDUCTING ELECTRONIC CRYSTALS
4
5/27/2025
Filed
10-2025-0068787
Republic of Korea
Method for designing high- and room-temperature (37 °C, Cd-based) superconductors, and compositions produced by that method
5
5/27/2025
Filed
10-2025-0068788
Republic of Korea
Room-temperature superconductor and method for producing the same
6
9/5/2025
Filed
10-2025-0126558
Republic of Korea
METHOD OF MODELING A HIGH-TEMPERATURE SUPERCONDUCTOR USING A MODULATED ELECTRONIC LATTICE
6.1
11/26/2025
Filed
PCT/KR2025/019735
International (PCT)
METHOD OF MODELING A HIGH-TEMPERATURE SUPERCONDUCTOR USING A MODULATED ELECTRONIC LATTICE
6.1.1
3/1/2026
Filed
19/523,723
United States
METHOD OF MODELING A HIGH-TEMPERATURE SUPERCONDUCTOR USING A MODULATED ELECTRONIC LATTICE
6.1.2
3/1/2026
Filed
25867309.4
Europe (EPO)
METHOD OF MODELING A HIGH-TEMPERATURE SUPERCONDUCTOR USING A MODULATED ELECTRONIC LATTICE
6.1.3
3/1/2026
Filed
2026-520414
Japan
METHOD OF MODELING A HIGH-TEMPERATURE SUPERCONDUCTOR USING A MODULATED ELECTRONIC LATTICE
6.1.4
3/1/2026
Filed
202617044554
India
METHOD OF MODELING A HIGH-TEMPERATURE SUPERCONDUCTOR USING A MODULATED ELECTRONIC LATTICE
6.1.5
3/1/2026
Filed
202580005582.9
China
METHOD OF MODELING A HIGH-TEMPERATURE SUPERCONDUCTOR USING A MODULATED ELECTRONIC LATTICE
8
11/27/2025
Filed
40-2025-0221608
Republic of Korea
SuperMatics: Korean trademark application, Nice Class 9
9
11/27/2025
Filed
40-2025-0221609
Republic of Korea
SuperMatics: Korean trademark application, Nice Class 42
10
12/19/2025
Filed
10-2025-0204191
Republic of Korea
DESIGN METHOD USING A HIGH TEMPERATURE SUPERCONDUCTOR DESIGN ALGORITHM BASED ON A MODULATED ELECTRONIC LATTICE MODEL
10.1
1/31/2026
Filed
PCT/KR2026/000998
International (PCT)
DESIGN METHOD USING A HIGH TEMPERATURE SUPERCONDUCTOR DESIGN ALGORITHM BASED ON A MODULATED ELECTRONIC LATTICE MODEL
10.1.1
3/1/2026
Filed
19/524,312
United States
DESIGN METHOD USING A HIGH TEMPERATURE SUPERCONDUCTOR DESIGN ALGORITHM BASED ON A MODULATED ELECTRONIC LATTICE MODEL
10.1.2
3/1/2026
Filed
29709342.5
Europe (EPO)
DESIGN METHOD USING A HIGH TEMPERATURE SUPERCONDUCTOR DESIGN ALGORITHM BASED ON A MODULATED ELECTRONIC LATTICE MODEL
10.1.3
3/1/2026
Filed
2026520414
Japan
DESIGN METHOD USING A HIGH TEMPERATURE SUPERCONDUCTOR DESIGN ALGORITHM BASED ON A MODULATED ELECTRONIC LATTICE MODEL
10.1.4
3/1/2026
Filed
202617045748
India
DESIGN METHOD USING A HIGH TEMPERATURE SUPERCONDUCTOR DESIGN ALGORITHM BASED ON A MODULATED ELECTRONIC LATTICE MODEL
10.1.5
3/1/2026
Filed
202680000572.0
China
DESIGN METHOD USING A HIGH TEMPERATURE SUPERCONDUCTOR DESIGN ALGORITHM BASED ON A MODULATED ELECTRONIC LATTICE MODEL
11
7/8/2026
Filed
10-2026-0125148
Republic of Korea
Kagome Lattice Modulation Wave Vector and Electronic Structure Phase Matching Based High-Temperature Superconductor Design Method
11.1
7/29/2026
Filed
PCT/KR2026/010449
International (PCT)
Kagome Lattice Modulation Wave Vector and Electronic Structure Phase Matching Based High-Temperature Superconductor Design Method